1. Field of the Invention
This invention generally relates to a chip package and a process thereof, and more particularly to a chip package having a rigid cover on the active surface of the chip and a process thereof.
2. Description of Related Art
In the semiconductor industry, integrated circuit (IC) manufacturing includes 3 steps—design, process, and packaging. Chips are manufactured by the steps of making wafer, designing the circuit, making the mask, cutting the wafer and so on. Each chip is electrically connected to the external circuit via the bond pads on the chip. Then the insulating material is optionally used to package the chip. The purposes of packaging are to protect the chip from moisture, heat and noise, and to provide the electrical connection between the chip and the external circuit such as printed circuit board (PCB) or other carriers.
As the IC packaging technology advances, the package is getting smaller. Among the IC packaging types, chip scale package (CSP) is one of the package technologies that the length of the package is smaller than 1.2 times of the length of the chip inside the package, or (the chip area/package area) is smaller than 80% while the pitch of the pins of the package is smaller than 1 mm. Based on the material and the structures, CSP includes rigid interposer type, flex interposer type, custom lead frame type, wafer level type and so on.
Unlike the packaging technology for single chip, the wafer level package focuses on packaging wafer in order to simplify the chip packaging process. Hence, after the integrated circuits have been manufactured on the wafer, the whole wafer can be packaged. Then the wafer cutting can be performed to form a plurality of chips from the wafer.